JPH0434307B2 - - Google Patents

Info

Publication number
JPH0434307B2
JPH0434307B2 JP57027109A JP2710982A JPH0434307B2 JP H0434307 B2 JPH0434307 B2 JP H0434307B2 JP 57027109 A JP57027109 A JP 57027109A JP 2710982 A JP2710982 A JP 2710982A JP H0434307 B2 JPH0434307 B2 JP H0434307B2
Authority
JP
Japan
Prior art keywords
power supply
wiring
potential power
wiring patterns
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57027109A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58143550A (ja
Inventor
Katsu Sanada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP57027109A priority Critical patent/JPS58143550A/ja
Publication of JPS58143550A publication Critical patent/JPS58143550A/ja
Publication of JPH0434307B2 publication Critical patent/JPH0434307B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90Masterslice integrated circuits

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP57027109A 1982-02-22 1982-02-22 半導体装置 Granted JPS58143550A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57027109A JPS58143550A (ja) 1982-02-22 1982-02-22 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57027109A JPS58143550A (ja) 1982-02-22 1982-02-22 半導体装置

Publications (2)

Publication Number Publication Date
JPS58143550A JPS58143550A (ja) 1983-08-26
JPH0434307B2 true JPH0434307B2 (en]) 1992-06-05

Family

ID=12211906

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57027109A Granted JPS58143550A (ja) 1982-02-22 1982-02-22 半導体装置

Country Status (1)

Country Link
JP (1) JPS58143550A (en])

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5165086A (en) * 1985-02-20 1992-11-17 Hitachi, Ltd. Microprocessor chip using two-level metal lines technology
JPS63175441A (ja) * 1987-01-14 1988-07-19 Nec Corp 半導体装置
JPS63307759A (ja) * 1987-06-09 1988-12-15 Nec Corp 半導体集積回路
JPS6413733U (en]) * 1987-07-16 1989-01-24
JPH01251639A (ja) * 1988-03-31 1989-10-06 Toshiba Corp 半導体集積回路装置
JPH01251640A (ja) * 1988-03-31 1989-10-06 Toshiba Corp 半導体集積回路装置
JP2516403B2 (ja) * 1988-06-01 1996-07-24 富士通株式会社 ウエハ・スケ―ル・メモリ

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1024661A (en) * 1974-06-26 1978-01-17 International Business Machines Corporation Wireable planar integrated circuit chip structure

Also Published As

Publication number Publication date
JPS58143550A (ja) 1983-08-26

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